ECE484 Laboratory Exercises

Automatic Layout Generation Tools (Device Level Placer)

In this tutorial an alternative way of drawing layouts will be introduced. This tutorial assumes that the reader is familiar with the Virtuoso layout tool and has followed the Manual layout manual.

 

A faster way of drawing a layout

 

Since the manual creation of the physical layout is labor intensive, significant amount of work has been put into the automation of the physical layout design process. The Layout-XL is one of the lower-level answers. The Layout-XL will read in a schematic and the tool "generate from source" in the layout window place all the transistors and I/O pins in the layout window. This tool will use parametric instances that will generate appropriately sized transistors.

Although the  and similar contemporary tools provide some nice features, the quality of the layouts they produce are still far from hand optimized layouts.

Steps of Automatic Layout Generation

Home Work: Draw the layout using Layout-XL ( Automatic Layout Generation Tool) for the 2-Input Nand gate

Note: The tutorials are taken from Worchester Polytechnic Institute and modified by VSD Prasad Boppana for ECE484 class in spring 2003.

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