ECE484 Laboratory Exercises

In this tutorial, a simple CMOS inverter layout will be drawn step by step. We will start with a simple design idea and will complete the mask layout using different techniques.

Steps of Layout Design

• Starting up
  • Design Idea
  • Create Layout Cellview
  • Virtuoso and LSW
• NMOS
  • Drawing the N-Diffusion (Active)
  • The Gate Poly
  • Making Active Contacts
  • Covering Contacts with Metal-1
  • The N-Select Layer
• PMOS
  • Drawing the P-Diffusion (Active)
  • Transistor Features
  • The P-Select Layer
  • Drawing the N-Well
• Connecting both transistors
  • Placing the PMOS and NMOS
  • Connecting the Output
  • Connecting the Input
  • Making a Metal-1 connection for the Input
  • Power Rails
  • P Substrate contact
  • N Substrate contact
  • Enclosing the Substrate Contact
• DRC and Finalizing
  • Design Rule Checking
  • Final Layout

Home Work: Enter the schematic for 3-Input Nor Gate and generate the symbol for the same.

Note: The tutorials are taken from Worchester Polytechnic Institute and are modified for ECE484 class in spring 2004.